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Engineering
Noise Margin
85%
Electronic Design Automation
72%
Multiplexing
72%
Simulation Result
69%
Nanoelectronics
65%
Defects
60%
Probabilistic Approach
54%
Network-on-Chip
54%
Reliability Analysis
49%
Input Vector
46%
Sizing Method
46%
Electric Power Utilization
45%
Energy Engineering
37%
Reliability Assessment
36%
Tape
36%
Schmitt Trigger
36%
Failure Analysis
36%
Circuit Designer
33%
Reliability Calculation
31%
Future Design
30%
Logic Gate
28%
Reliability Evaluation
27%
Design Alternative
27%
Nodes
26%
Nanometer Range
24%
Floating Point
24%
Main Conclusion
22%
Target Reliability
21%
Circuit Design
18%
Flat Fading Channel
18%
Development Process
18%
Combinatorial Circuits
18%
Transients
18%
Performance Analysis
18%
Mobile Phone
18%
Low Power Electronics
18%
Reliability Estimation
18%
Matrix Method
18%
Logic Circuit
18%
Mechanical Switch
18%
Hybrid Power
18%
Nash Equilibrium
18%
Power Level
18%
Genetic Algorithm
18%
Channel Model
18%
Power Control
18%
Initial Point
18%
Control Algorithm
18%
Experimental Result
18%
Power Limit
18%
Cost Function
18%
Portable Computer
18%
Design Technique
18%
Design Constraint
18%
Accurate Calculation
18%
Tunnel Diode
18%
High Integration Density
18%
Adders
18%
Fundamental Limit
18%
Semiconductor Manufacturing
18%
Length (L)
16%
Supply Voltage
15%
Metrics
15%
Calculated Reliability
12%
Synaptic Connection
12%
Nanoscale
12%
Square Method
10%
Voltage Vector
9%
Closed Form Expression
9%
Process Validation
9%
Design Complexity
9%
Consuming Process
9%
Conflicting Goal
9%
Mathematical Technique
9%
Desirability
9%
Received Bit
9%
Circuit Variable
9%
Output Signal
9%
Design Parameter
9%
System-on-Chip
9%
Design Verification
9%
Complete Solution
9%
Complementary Metal-Oxide-Semiconductor Device
9%
Interconnects
9%
Failure Model
9%
Failure Rate
9%
Late Stage
9%
Field Effect Transistor
9%
Low Power Operation
9%
Block Level
9%
Design Basis
9%
Tasks
9%
Minimizing Energy
9%
Current Threshold
9%
Current Sensor
9%
Smallest Feature
9%
Design Criterion
9%
Absolute Difference
6%
Simulation Method
6%
Improving Efficiency
6%
Keyphrases
Vector Selection
36%
Test Vector
36%
VLSI Testing
36%
Majority Gate
36%
Intrinsic Noise
36%
Electronic Design Automation Tools
30%
Implications for Design
27%
Full Adder
27%
Joule
27%
Device Level
24%
Reliability Evaluation
22%
Full Adder Design
22%
Nanoelectronics
21%
Probabilistic Transfer Matrix
19%
Proxels
18%
Nanocircuits
18%
Effective Algorithm
18%
Reliability Margins
18%
Wire-driven
18%
Communication Approaches
18%
Genetic Algorithm
18%
Adaptive Genetic Algorithm
18%
Flat Fading Channel
18%
Circuit Reliability
18%
Monte Carlo
18%
Online Management System
18%
Critical Logic
18%
EDA Tools
18%
Vector Management
18%
Atto
18%
Logic Circuit
18%
Hybrid Nano
18%
Nanoelectromechanical Switch
18%
Minimizing Communication
18%
Communication Power
18%
Wireless Data
18%
Power Control Algorithm
18%
Channel Model
18%
Game Analysis
18%
Web-based Course
18%
Multiplexing
18%
Advanced Technology Node
18%
Android-based
18%
Student Outcomes
18%
Von Neumann
18%
Direct Mapping
18%
Nonlinear Solver
18%
Schmitt Trigger Inverter
18%
Schmitt Trigger
18%
Hands-on Education
18%
Full Adder Cell
18%
Adder Design
18%
Upsizing
18%
Charging Management
18%
Static Noise Margin
18%
Service Satisfaction
18%
Body Bias
18%
Length-dependent
18%
Failure Analysis
18%
Noise Variation
18%
Discreetness
18%
Network on chip
18%
Wireless Channel
18%
Electron Density
18%
Justice
18%
Extrinsic Noise
18%
Rent's Rule
18%
Many-core
18%
Classical Particle
18%
Probabilistic Approach
18%
Statistical Failures
18%
Extrinsic Defects
18%
Fan-in
18%
Dependent Probability
18%
Optimum Reliability
18%
Embedded Course
18%
Voltage Range
18%
Adaptive Heuristic Algorithm
18%
CMOS Inverter
18%
Serial Adder
18%
Test Case Selection
18%
Partial Coverage
18%
Most Complex
18%
Resource Management Policy
18%
Covering Problem
18%
Coverage Problem
18%
Test Coverage
18%
Locally Connected
18%
Power Delay Product
18%
Course Portfolio
18%
Affordable System
18%
Design Compiler
18%
Resource Allocation Framework
18%
Function Model
18%
Computer Architecture
18%
Low-power Adder
18%
Gate Reliability
18%
Next Generation Wireless Networks
18%
Reliability Assessment
18%
Pedagogical Tools
18%
Computer Science
Noise Margin
100%
Threshold Voltage
95%
And Gate
46%
Supply Voltage
39%
Multiplexing
36%
Networks on Chips
36%
Probabilistic Approach
36%
Monte Carlo Simulation
30%
Logic Gate
30%
Parasitic Capacitance
27%
Failure Analysis
24%
adaptive genetic algorithm
18%
Flat Fading
18%
Heuristic Algorithm
18%
Verification Process
18%
Fading Channel
18%
Control Algorithm
18%
Nash Equilibrium
18%
Communication Scheme
18%
Design Strategy
18%
Energy Consumption
18%
Consensus Algorithm
18%
Empirical Test
18%
Student Outcome
18%
Direct Mapping
18%
Mobile App
18%
Network Topology
18%
Many-Core
18%
Wireless Channel
18%
Fault Detection
18%
Serial Architecture
18%
Permanent Fault
18%
Detection Mechanism
18%
Energy Delay Product
18%
Transient Fault
18%
Resource Management Policy
18%
Coverage Test
18%
and-or gate
18%
Computer Architecture
18%
Architecture Design
18%
Electron Density
18%
Estimate Reliability
18%
Education Institution
18%
Independent Learning
18%
Work-Group
18%
Positive Experience
18%
programming course
18%
C Programming
18%
Programming Language
18%
Teaching Practice
18%
Gamification
18%
Reported Result
16%
Learning Approach
10%
Transfer Characteristic
10%
Privacy Control
9%
Power Consumption
9%
Condition Coverage
9%
Validation Phase
9%
Data Privacy
9%
Case Study
9%
Social Activity
9%
Power Dissipation
9%
Cache Memory
9%
Cellular System
9%
Verification Plan
9%
Design Verification
9%
System on a Chip
9%
System Architect
9%
Individual Core
9%
Teaching and Learning
9%
High Reliability
9%
Utility Function
9%
Digital Circuit
9%
Validation Team
9%
Development Process
9%
Design Complexity
9%
Social Desirability
9%
Correctly Received Bit
9%
Average Utility
9%
Feasible Point
9%
Grand Challenge
9%
Dynamic Power
9%
Single Electron
9%
Combinatorial Logic
9%
Reducing Power Consumption
9%
Memory Address
9%
Address Calculation
9%
Digital Signal Processor
9%
closed-form expression
9%
Wait Time
9%
Portable Computer
9%
Learning Practice
9%
Design Validation
9%
Timing Verification
9%
Memory Design
9%
Error Correcting Codes
9%
Mobile Application
9%
Hardware Configuration
9%
Benchmark Program
9%
Memory Hierarchy
9%
