10Gbit/s 2mW inductorless transimpedance amplifier

Mohamed Atef; Horst Zimmermann

doi:10.1109/ISCAS.2012.6271595

10Gbit/s 2mW inductorless transimpedance amplifier

Mohamed Atef, Horst Zimmermann

Research output: Contribution to conference › Paper › peer-review

22 Citations (Scopus)

Abstract

This work presents the design and performance of a 10Gbit/s transimpedance amplifier (TIA) implemented in a 40nm CMOS technology. The introduced TIA uses an inverter with active common-drain feedback (ICDF-TIA). The TIA is followed by a two-stage differential amplifier and a 50 differential output driver to provide an interface to the measurement setup. The optical receiver shows an optical sensitivity of 19dBm for a BER= 10 ¹². The transimpedance amplifier achieves a transimpedance gain of 47dB, 8GHz bandwidth with 0.45pF total input capacitance for the photodiode, ESD protection and input PAD. The TIA occupies 0.0002mm ² whereas the complete optical receiver occupies a chip area of 0.16mm ². The power consumption of the TIA is only 2mW and the complete chip dissipates 16mW for a 1.1V single supply voltage. The complete optical receiver has a 58dB transimpedance gain and 7GHz bandwidth.

Original language	English
Pages	1728-1731
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2012.6271595
Publication status	Published - 2012
Externally published	Yes
Event	2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of Duration: May 20 2012 → May 23 2012

Conference

Conference	2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012
Country/Territory	Korea, Republic of
City	Seoul
Period	5/20/12 → 5/23/12

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/ISCAS.2012.6271595

Cite this

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abstract = "This work presents the design and performance of a 10Gbit/s transimpedance amplifier (TIA) implemented in a 40nm CMOS technology. The introduced TIA uses an inverter with active common-drain feedback (ICDF-TIA). The TIA is followed by a two-stage differential amplifier and a 50 differential output driver to provide an interface to the measurement setup. The optical receiver shows an optical sensitivity of 19dBm for a BER= 10 12. The transimpedance amplifier achieves a transimpedance gain of 47dB, 8GHz bandwidth with 0.45pF total input capacitance for the photodiode, ESD protection and input PAD. The TIA occupies 0.0002mm 2 whereas the complete optical receiver occupies a chip area of 0.16mm 2. The power consumption of the TIA is only 2mW and the complete chip dissipates 16mW for a 1.1V single supply voltage. The complete optical receiver has a 58dB transimpedance gain and 7GHz bandwidth.",

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year = "2012",

doi = "10.1109/ISCAS.2012.6271595",

language = "English",

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10Gbit/s 2mW inductorless transimpedance amplifier

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