A 0.5-6GHz low gain linear RF front-end in 90nm CMOS

Rashad Ramzan; Rashad Ranzan; Naveed Ahsan; Jerzy Dabrowski; Christer Svensson

A 0.5-6GHz low gain linear RF front-end in 90nm CMOS

Rashad Ramzan, Rashad Ranzan, Naveed Ahsan, Jerzy Dabrowski, Christer Svensson

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

This paper presents the design and measurement results of low gain RF front-end manufactured in 90nm CMOS covering the frequency range of 0.5-6GHz. The front-end is a modified form of a balanced active mixer to enhance its gain and achieve wideband input matching. The transconductance stage of a mixer is split into NMOS-PMOS inverter pair for better linearity and partial noise cancellation. The inverter stage with common drain feedback achieves wideband input impedance match better than -8dB up to 8GHz. The voltage conversion gain is 5dB at 6GHz with 3dB bandwidth of more than 5.5GHz. The measured single side band noise figure at LO frequency of 1.5GHz and IF of 30MHz is 7dB. The measured 1dB compression point is -17dBm at 2.4GHz. Similarly, measured IIP3 is 2.5dBm and IIP2 is 40dBm at 1GHz. The complete front-end consumes 23mW with active chip area of only 0.048mm².

Original language	English
Title of host publication	Proceedings of the 17th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2010
Pages	168-171
Number of pages	4
Publication status	Published - Oct 6 2010
Externally published	Yes
Event	17th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2010 - Wroclaw, Poland Duration: Jun 24 2010 → Jun 26 2010

Publication series

Name	Proceedings of the 17th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2010

Other

Other	17th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2010
Country/Territory	Poland
City	Wroclaw
Period	6/24/10 → 6/26/10

Keywords

Integrated LNA and mixer
Multi-standard
RF front-end
Software defined radio (SDR)
Wideband receiver
Zero-IF

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

Cite this

Ramzan, R., Ranzan, R., Ahsan, N., Dabrowski, J., & Svensson, C. (2010). A 0.5-6GHz low gain linear RF front-end in 90nm CMOS. In Proceedings of the 17th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2010 (pp. 168-171). [5551311] (Proceedings of the 17th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2010).

A 0.5-6GHz low gain linear RF front-end in 90nm CMOS. / Ramzan, Rashad; Ranzan, Rashad; Ahsan, Naveed et al.
Proceedings of the 17th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2010. 2010. p. 168-171 5551311 (Proceedings of the 17th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2010).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Ramzan, R, Ranzan, R, Ahsan, N, Dabrowski, J & Svensson, C 2010, A 0.5-6GHz low gain linear RF front-end in 90nm CMOS. in Proceedings of the 17th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2010., 5551311, Proceedings of the 17th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2010, pp. 168-171, 17th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2010, Wroclaw, Poland, 6/24/10.

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abstract = "This paper presents the design and measurement results of low gain RF front-end manufactured in 90nm CMOS covering the frequency range of 0.5-6GHz. The front-end is a modified form of a balanced active mixer to enhance its gain and achieve wideband input matching. The transconductance stage of a mixer is split into NMOS-PMOS inverter pair for better linearity and partial noise cancellation. The inverter stage with common drain feedback achieves wideband input impedance match better than -8dB up to 8GHz. The voltage conversion gain is 5dB at 6GHz with 3dB bandwidth of more than 5.5GHz. The measured single side band noise figure at LO frequency of 1.5GHz and IF of 30MHz is 7dB. The measured 1dB compression point is -17dBm at 2.4GHz. Similarly, measured IIP3 is 2.5dBm and IIP2 is 40dBm at 1GHz. The complete front-end consumes 23mW with active chip area of only 0.048mm2.",

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N2 - This paper presents the design and measurement results of low gain RF front-end manufactured in 90nm CMOS covering the frequency range of 0.5-6GHz. The front-end is a modified form of a balanced active mixer to enhance its gain and achieve wideband input matching. The transconductance stage of a mixer is split into NMOS-PMOS inverter pair for better linearity and partial noise cancellation. The inverter stage with common drain feedback achieves wideband input impedance match better than -8dB up to 8GHz. The voltage conversion gain is 5dB at 6GHz with 3dB bandwidth of more than 5.5GHz. The measured single side band noise figure at LO frequency of 1.5GHz and IF of 30MHz is 7dB. The measured 1dB compression point is -17dBm at 2.4GHz. Similarly, measured IIP3 is 2.5dBm and IIP2 is 40dBm at 1GHz. The complete front-end consumes 23mW with active chip area of only 0.048mm2.

AB - This paper presents the design and measurement results of low gain RF front-end manufactured in 90nm CMOS covering the frequency range of 0.5-6GHz. The front-end is a modified form of a balanced active mixer to enhance its gain and achieve wideband input matching. The transconductance stage of a mixer is split into NMOS-PMOS inverter pair for better linearity and partial noise cancellation. The inverter stage with common drain feedback achieves wideband input impedance match better than -8dB up to 8GHz. The voltage conversion gain is 5dB at 6GHz with 3dB bandwidth of more than 5.5GHz. The measured single side band noise figure at LO frequency of 1.5GHz and IF of 30MHz is 7dB. The measured 1dB compression point is -17dBm at 2.4GHz. Similarly, measured IIP3 is 2.5dBm and IIP2 is 40dBm at 1GHz. The complete front-end consumes 23mW with active chip area of only 0.048mm2.

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KW - Software defined radio (SDR)

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A 0.5-6GHz low gain linear RF front-end in 90nm CMOS

Abstract

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Keywords

ASJC Scopus subject areas

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