Abstract
This brief presents the design of an ultra-low power level-crossing analog-to-digital converter (LC-ADC) for IoT and biomedical applications. The proposed LC-ADC utilizes only one multi-level comparator instead of multiple comparators as in conventional LC-ADC, leading to simplified implementation and significant reduction in power. Implemented in 0.18-μ m CMOS process, the LC-ADC achieves 7.9 equivalent number of bits with a 49 dB signal-to-noise and distortion ratio at the input frequency up to 1 kHz. The measured minimum power is only 4.2 nW at the supply voltage of 0.55 V.
Original language | English |
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Article number | 8411440 |
Pages (from-to) | 1390-1394 |
Number of pages | 5 |
Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
Volume | 65 |
Issue number | 10 |
DOIs | |
Publication status | Published - Oct 2018 |
Externally published | Yes |
Keywords
- LC-ADC
- multi-level comparator
- ultra-low power
ASJC Scopus subject areas
- Electrical and Electronic Engineering