TY - GEN
T1 - A low power programmable gain integrated front-end for electromyogram signal sensing
AU - Hamed, Ehab A.
AU - Atef, Mohamed
AU - Abbas, Mohamed
N1 - Publisher Copyright:
Copyright © 2018 by Department of Microelectronics & Computer Science, Lodz University of Technology
PY - 2018/8/14
Y1 - 2018/8/14
N2 - This paper presents the design and post layout simulation for electromyogram (EMG) front-end. The architecture is characterized by ultralow power consumption and gain reconfigurability. Three stages are designed to form the whole front-end. The first stage is extremely efficient single ended amplifier. The second stage is programable gain differential ended amplifier, to enhance the overall supply rejection ratio, common mode rejection ratio and the dynamic range. Finally, the third stage is a buffer stage to isolate the loading from the amplifier. The first two stages are designed with cascode MOSFETs to increase the midband gain. The full design was post-layout simulated using 130 nm CMOS technology. The results show that the design has 60.36 dB mid-band gain in range of 5.3 Hz to 1.72 kHz. Using a supply voltage of 1.1 V, the first two stages consume 1.06 μA. The input referred noise is 2.95 μVrms. The common mode and power supply rejection ratios are above 94.5 dB and 79.4 dB respectively.
AB - This paper presents the design and post layout simulation for electromyogram (EMG) front-end. The architecture is characterized by ultralow power consumption and gain reconfigurability. Three stages are designed to form the whole front-end. The first stage is extremely efficient single ended amplifier. The second stage is programable gain differential ended amplifier, to enhance the overall supply rejection ratio, common mode rejection ratio and the dynamic range. Finally, the third stage is a buffer stage to isolate the loading from the amplifier. The first two stages are designed with cascode MOSFETs to increase the midband gain. The full design was post-layout simulated using 130 nm CMOS technology. The results show that the design has 60.36 dB mid-band gain in range of 5.3 Hz to 1.72 kHz. Using a supply voltage of 1.1 V, the first two stages consume 1.06 μA. The input referred noise is 2.95 μVrms. The common mode and power supply rejection ratios are above 94.5 dB and 79.4 dB respectively.
KW - Common mode rejection ratio (CMRR)
KW - Current-reuse complimentary input (CRCI)
KW - Electromyogram (EMG)
KW - Power supply rejection ratio (PSRR)
KW - Programable gain amplifier (PGA)
KW - Ultralow power
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U2 - 10.23919/MIXDES.2018.8444557
DO - 10.23919/MIXDES.2018.8444557
M3 - Conference contribution
AN - SCOPUS:85074981455
SN - 9788363578138
T3 - Proceedings of 25th International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2018
SP - 103
EP - 108
BT - Proceedings of 25th International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2018
A2 - Napieralski, Andrzej
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 25th International Conference "Mixed Design of Integrated Circuits and Systems", MIXDES 2018
Y2 - 21 June 2018 through 23 June 2018
ER -