A novel highly reliable low-power nano architecture when von Neumann augments Kolmogorov

Valeriu Beiu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

25 Citations (Scopus)

Abstract

This paper presents a novel architecture, which is both device and circuit independent. The starting idea is that computations can be performed in three fundamentally different ways: entirely digital (using Boolean gates), entirely analog (using analog circuits), or mixed (using both digital and analog circuits). The boundaries between these are sometimes very thin. As an example, a threshold logic gate is already mixed, i.e. even if the inputs and the output are Boolean, the weighted sum-of-inputs is a multiple-valued logic signal, i.e. a low-precision analog signal. It has already been suggested that, at least for CMOS, a mixed analog/digital approach is the most power-efficient solution. Still, the main disadvantages of using analog circuits are: (i) their more complex (handcrafted) design, and (ii) their (expected) lower reliability (signal-to-noise or precision), which will be exacerbated by scaling. Here, we will show how both these disadvantages could be tackled. A constructive solution for Kolmogorov's superposition and (multi-threshold) threshold logic synthesis could be used for automating the design. Digital or threshold logic circuits will compensate for the accumulation of noise in the cascaded (very) low precision analog circuits. These digital circuits will also contribute to a von Neumann's multiplexing scheme used to augment the defect- and fault-tolerance of the architecture. A few examples will show how this architectural approach could be mapped on top of a given (nano) technology.

Original languageEnglish
Title of host publicationProceedings - 15th IEEE International Conference on Applications-Specific Systems, Architectures and Processors
Pages167-177
Number of pages11
DOIs
Publication statusPublished - 2004
Externally publishedYes
EventProceedings - 15th IEEE International Conference on Applications-Specific Systems, Architectures and Processors - Galveston, TX, United States
Duration: Sept 27 2004Sept 29 2004

Publication series

NameProceedings of the International Conference on Application-Specific Systems, Architectures and Processors
ISSN (Print)1063-6862

Other

OtherProceedings - 15th IEEE International Conference on Applications-Specific Systems, Architectures and Processors
Country/TerritoryUnited States
CityGalveston, TX
Period9/27/049/29/04

ASJC Scopus subject areas

  • Hardware and Architecture
  • Computer Networks and Communications

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