Abstract
Wideband noise cancelling LNAs reported in recent literature consume very large power because of the additional stages required for noise cancelling. This makes them inappropriate for portable applications. Based on this fact, the design of a low power, noise cancelling, wideband LNA is presented in this paper. To demonstrate the proposed circuit, novel use of popular current reuse LNA architecture in combination with the noise cancellation technique is presented. The current reuse architecture aids in obtaining necessary phase difference between signal and noise while providing power optimization. This paper presents detailed mathematical analysis of the modified input impedance, gain and noise figure. The proposed LNA is designed for UWB applications using 130 nm IBM CMOS process. The simulation results demonstrated 3dB bandwidth of 2.35-9.37 GHz with maximum forward gain (S21) of 10.3 dB and achieved minimum noise figure (NFmin) of 3.68dB. The simulated input referred third order intercept point (IIP3) and 1 dB compression point (P1dB) are found to be -4 dBm and -12.55 dBm respectively. With a power supply of 1.3 V, the proposed circuit consumes 9.97 mW only.
Original language | English |
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Pages (from-to) | 109-118 |
Number of pages | 10 |
Journal | AEU - International Journal of Electronics and Communications |
Volume | 69 |
Issue number | 1 |
DOIs | |
Publication status | Published - Jan 2015 |
Keywords
- Current reuse
- Low power
- Noise cancelling
- UWB
- Wideband LNA
ASJC Scopus subject areas
- Electrical and Electronic Engineering