CMOS blocks for on-chip RF test

Rashad Ramzan; Jerzy Dąbrowski

doi:10.1007/s10470-006-9615-2

CMOS blocks for on-chip RF test

Rashad Ramzan, Jerzy Dąbrowski

Research output: Contribution to journal › Article › peer-review

7 Citations (Scopus)

Abstract

In this paper we present two designs of CMOS blocks suitable for integration with RF frontend blocks for test purposes. Those are a programmable RF test attenuator and a reconfigurable low noise amplifier (LNA), optimized with respect to their function and location in the circuit. We discuss their performances in terms of the test- and normal operation mode. The presented application model aims at a transceiver under loopback test with enhanced controllability and detectability. The circuits are designed for 0.35μm CMOS process. Simulation results of the receiver frontend operating in 2.4 GHz band are presented showing tradeoffs between the performance and test functionality.

Original language	English
Pages (from-to)	151-160
Number of pages	10
Journal	Analog Integrated Circuits and Signal Processing
Volume	49
Issue number	2
DOIs	https://doi.org/10.1007/s10470-006-9615-2
Publication status	Published - Oct 2006
Externally published	Yes

Keywords

DfT
Loopback test
RF frontend
RF test
RF-CMOS design
Radio transceivers

ASJC Scopus subject areas

Signal Processing
Hardware and Architecture
Surfaces, Coatings and Films

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10.1007/s10470-006-9615-2

Cite this

@article{5784b63b321d462d85d8ffcb8d0bee06,

title = "CMOS blocks for on-chip RF test",

abstract = "In this paper we present two designs of CMOS blocks suitable for integration with RF frontend blocks for test purposes. Those are a programmable RF test attenuator and a reconfigurable low noise amplifier (LNA), optimized with respect to their function and location in the circuit. We discuss their performances in terms of the test- and normal operation mode. The presented application model aims at a transceiver under loopback test with enhanced controllability and detectability. The circuits are designed for 0.35μm CMOS process. Simulation results of the receiver frontend operating in 2.4 GHz band are presented showing tradeoffs between the performance and test functionality.",

keywords = "DfT, Loopback test, RF frontend, RF test, RF-CMOS design, Radio transceivers",

author = "Rashad Ramzan and Jerzy D{\c a}browski",

year = "2006",

month = oct,

doi = "10.1007/s10470-006-9615-2",

language = "English",

volume = "49",

pages = "151--160",

journal = "Analog Integrated Circuits and Signal Processing",

issn = "0925-1030",

publisher = "Springer Netherlands",

number = "2",

}

TY - JOUR

T1 - CMOS blocks for on-chip RF test

AU - Ramzan, Rashad

AU - Dąbrowski, Jerzy

PY - 2006/10

Y1 - 2006/10

N2 - In this paper we present two designs of CMOS blocks suitable for integration with RF frontend blocks for test purposes. Those are a programmable RF test attenuator and a reconfigurable low noise amplifier (LNA), optimized with respect to their function and location in the circuit. We discuss their performances in terms of the test- and normal operation mode. The presented application model aims at a transceiver under loopback test with enhanced controllability and detectability. The circuits are designed for 0.35μm CMOS process. Simulation results of the receiver frontend operating in 2.4 GHz band are presented showing tradeoffs between the performance and test functionality.

AB - In this paper we present two designs of CMOS blocks suitable for integration with RF frontend blocks for test purposes. Those are a programmable RF test attenuator and a reconfigurable low noise amplifier (LNA), optimized with respect to their function and location in the circuit. We discuss their performances in terms of the test- and normal operation mode. The presented application model aims at a transceiver under loopback test with enhanced controllability and detectability. The circuits are designed for 0.35μm CMOS process. Simulation results of the receiver frontend operating in 2.4 GHz band are presented showing tradeoffs between the performance and test functionality.

KW - DfT

KW - Loopback test

KW - RF frontend

KW - RF test

KW - RF-CMOS design

KW - Radio transceivers

UR - http://www.scopus.com/inward/record.url?scp=33749985761&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33749985761&partnerID=8YFLogxK

U2 - 10.1007/s10470-006-9615-2

DO - 10.1007/s10470-006-9615-2

M3 - Article

AN - SCOPUS:33749985761

SN - 0925-1030

VL - 49

SP - 151

EP - 160

JO - Analog Integrated Circuits and Signal Processing

JF - Analog Integrated Circuits and Signal Processing

IS - 2

ER -

CMOS blocks for on-chip RF test

Abstract

Keywords

ASJC Scopus subject areas

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