CMOS blocks for on-chip RF test

Rashad Ramzan, Jerzy Dąbrowski

Research output: Contribution to journalArticlepeer-review

7 Citations (Scopus)


In this paper we present two designs of CMOS blocks suitable for integration with RF frontend blocks for test purposes. Those are a programmable RF test attenuator and a reconfigurable low noise amplifier (LNA), optimized with respect to their function and location in the circuit. We discuss their performances in terms of the test- and normal operation mode. The presented application model aims at a transceiver under loopback test with enhanced controllability and detectability. The circuits are designed for 0.35μm CMOS process. Simulation results of the receiver frontend operating in 2.4 GHz band are presented showing tradeoffs between the performance and test functionality.

Original languageEnglish
Pages (from-to)151-160
Number of pages10
JournalAnalog Integrated Circuits and Signal Processing
Issue number2
Publication statusPublished - Oct 2006
Externally publishedYes


  • DfT
  • Loopback test
  • RF frontend
  • RF test
  • RF-CMOS design
  • Radio transceivers

ASJC Scopus subject areas

  • Signal Processing
  • Hardware and Architecture
  • Surfaces, Coatings and Films


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