TY - GEN
T1 - Cooling of a stacked multichip module - Tests and validations
AU - Chen, X. Y.
AU - Toh, K. C.
AU - Chai, J. C.
AU - Wong, T. N.
AU - Pinjala, D.
AU - Navas, O. K.
AU - Ganesh,
AU - Zhang, Hengyun
AU - Kripesh, V.
N1 - Publisher Copyright:
© 2003 IEEE.
PY - 2003
Y1 - 2003
N2 - In this paper, the experimental results for a stacked Multichip Module (MCM) designed for single phase direct liquid cooling using FC-72 are presented and discussed. The stacked MCM consists of three thermal test chips, each attached on a carrier, which is stacked vertically, and the whole mounted on a substrate. It is first tested under natural convection in air, to establish the minimum acceptable conditions it can operate. A direct liquid cooling scheme was then applied to the stacked MCM, which is covered by a plastic casing, and the dielectric coolant is forced to flow over the three chips. The thermal resistances for a single chip powered and three chips powered conditions are shown for different flow rates. The pressure drops between the inlet and outlet for different flow rates are also shown and discussed. The characteristics of heat dissipation in a 3D stacked package can hence be deduced. The maximum limit on the package power currently tested (4W) is however quite limited because of the high flow bypass and relatively low flow rate. Further analysis indicates that by reducing the bypass, increasing the flow rate and using better coolants, a maximum power of 40W is achievable for single phase liquid cooling. Higher cooling potential may require two-phase flow conditions.
AB - In this paper, the experimental results for a stacked Multichip Module (MCM) designed for single phase direct liquid cooling using FC-72 are presented and discussed. The stacked MCM consists of three thermal test chips, each attached on a carrier, which is stacked vertically, and the whole mounted on a substrate. It is first tested under natural convection in air, to establish the minimum acceptable conditions it can operate. A direct liquid cooling scheme was then applied to the stacked MCM, which is covered by a plastic casing, and the dielectric coolant is forced to flow over the three chips. The thermal resistances for a single chip powered and three chips powered conditions are shown for different flow rates. The pressure drops between the inlet and outlet for different flow rates are also shown and discussed. The characteristics of heat dissipation in a 3D stacked package can hence be deduced. The maximum limit on the package power currently tested (4W) is however quite limited because of the high flow bypass and relatively low flow rate. Further analysis indicates that by reducing the bypass, increasing the flow rate and using better coolants, a maximum power of 40W is achievable for single phase liquid cooling. Higher cooling potential may require two-phase flow conditions.
UR - https://www.scopus.com/pages/publications/84876582711
UR - https://www.scopus.com/pages/publications/84876582711#tab=citedBy
U2 - 10.1109/EPTC.2003.1271595
DO - 10.1109/EPTC.2003.1271595
M3 - Conference contribution
AN - SCOPUS:84876582711
T3 - Proceedings of 5th Electronics Packaging Technology Conference, EPTC 2003
SP - 633
EP - 637
BT - Proceedings of 5th Electronics Packaging Technology Conference, EPTC 2003
A2 - Iyer, Mahadevan K.
A2 - Mui, Yew Cheong
A2 - Toh, Kok Chuan
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 5th Electronics Packaging Technology Conference, EPTC 2003
Y2 - 10 December 2003 through 12 December 2003
ER -