Effect of Quine-McCluskey simplification on boolean space complexity

P. W.Chandana Prasad, Azam Beg, Ashutosh Kumar Singh

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    3 Citations (Scopus)

    Abstract

    The minimization of logic gates is needed to simplify the hardware design area of programmable logic arrays (PLAs) and to speed up the circuits. The VLSI designers can use minimization methods to produce high speed, inexpensive and energy-efficient integrated circuits with increased complexity. Quine-McCluskey (Q-M) is an attractive algorithm for simplifying Boolean expressions because it can handle any number of variables. This paper describes a new model for the estimation of circuit complexity, based on Quine-McCluskey simplification method. The proposed method utilizes data derived from Monte-Carlo simulations for any Boolean function with different count of variables and product term complexities. The model allows design feasibility and performance analysis prior to the circuit realization.

    Original languageEnglish
    Title of host publication2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009
    PublisherIEEE Computer Society
    Pages165-170
    Number of pages6
    ISBN (Print)9781424428878
    DOIs
    Publication statusPublished - Jan 1 2009
    Event2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009 - Kuala Lumpur, Malaysia
    Duration: Jul 25 2009Jul 26 2009

    Publication series

    Name2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009

    Other

    Other2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009
    Country/TerritoryMalaysia
    CityKuala Lumpur
    Period7/25/097/26/09

    ASJC Scopus subject areas

    • Artificial Intelligence
    • Information Systems
    • Industrial and Manufacturing Engineering

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