TY - GEN
T1 - Effect of Quine-McCluskey simplification on boolean space complexity
AU - Prasad, P. W.Chandana
AU - Beg, Azam
AU - Singh, Ashutosh Kumar
PY - 2009/1/1
Y1 - 2009/1/1
N2 - The minimization of logic gates is needed to simplify the hardware design area of programmable logic arrays (PLAs) and to speed up the circuits. The VLSI designers can use minimization methods to produce high speed, inexpensive and energy-efficient integrated circuits with increased complexity. Quine-McCluskey (Q-M) is an attractive algorithm for simplifying Boolean expressions because it can handle any number of variables. This paper describes a new model for the estimation of circuit complexity, based on Quine-McCluskey simplification method. The proposed method utilizes data derived from Monte-Carlo simulations for any Boolean function with different count of variables and product term complexities. The model allows design feasibility and performance analysis prior to the circuit realization.
AB - The minimization of logic gates is needed to simplify the hardware design area of programmable logic arrays (PLAs) and to speed up the circuits. The VLSI designers can use minimization methods to produce high speed, inexpensive and energy-efficient integrated circuits with increased complexity. Quine-McCluskey (Q-M) is an attractive algorithm for simplifying Boolean expressions because it can handle any number of variables. This paper describes a new model for the estimation of circuit complexity, based on Quine-McCluskey simplification method. The proposed method utilizes data derived from Monte-Carlo simulations for any Boolean function with different count of variables and product term complexities. The model allows design feasibility and performance analysis prior to the circuit realization.
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U2 - 10.1109/CITISIA.2009.5224219
DO - 10.1109/CITISIA.2009.5224219
M3 - Conference contribution
AN - SCOPUS:70449087466
SN - 9781424428878
T3 - 2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009
SP - 165
EP - 170
BT - 2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009
PB - IEEE Computer Society
T2 - 2009 Innovative Technologies in Intelligent Systems and Industrial Applications, CITISIA 2009
Y2 - 25 July 2009 through 26 July 2009
ER -