Evolution and Analysis of GaN GAA FET Induced High-K Spacer Wrapped Gate Underlap for Superfast Circuitry and RF Applications

Gallium Nitride (GaN) Gate-All-Around (GAA) FETs are developed to be promising candidates for high-frequency, superfast circuitry and RF applications mainly due to their superior electron mobility and wide bandgap. A variety of GaN GAA FETs are developed incorporating gate underlap, spacer technology and source/drain engineering. A comprehensive analysis of DC and AC/RF performance parameters of high-k spacer-wrapped underlap-induced GaN GAA FETs with source and drain enlargements are attained. The impact of this spacer engineering on threshold voltage (V_th), drain-induced barrier lowering (DIBL), subthreshold swing (SS), ON-current (I_On), leakage current (I_Off), and switching speed (I_On/I_Off) are systematically evaluated. It is inevitably determined that integrating a high-K spacer substantially improves electrostatic control, thereby mitigates short-channel effects while achieve a near ideal SS of ~62 mV/decade. A refined underlap design with high-k wrapping effectively subdues fringing field effects by reducing parasitic capacitances and resistances acquiring cut-off frequency of ~7.2 THz, improves AC performances. The underlap region suppresses DIBL, maintaining excellent gate control while achieving a higher I_On/I_Off ratio of ~ 19 × 10⁸ instigating development of the novel device for superfast circuitry applications. The analysis is calibrated and validated with experimentally fabricated devices while V_th is analytically modelled. Comparison with existing research and proposed IRDS 2028 of 1.5 nm technology node shows the underlap-induced GaN GAA FET is advantageous, highlighting its effectiveness in reducing power dissipation, and enhancing switching performance. These findings confirm the design is well-suited for next-generation low-power, high-performance, superfast circuitry and RF applications offering superior energy efficiency and reliability in ultra-scaled transistor architectures.