TY - JOUR
T1 - Fault tolerance designs of interconnection networks
AU - Nadeem, Muhammad Faisal
AU - Imran, Muhammad
AU - Afzal Siddiqui, Hafiz Muhammad
AU - Azeem, Muhammad
N1 - Publisher Copyright:
© 2023, The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature.
PY - 2023/3
Y1 - 2023/3
N2 - Multiprocessor interconnection networks are mainly required to link a significant number of stable processor memory sets, every one of which is known as a processing vertex. Due to the cost-effectiveness, the design and utilization of multiprocessor interconnection networks have drawn attention lately. An interconnection network is extensively used in a parallel multiprocessor system to connect the processors and memory modules. In multiprocessor networks, vertices represent processors, and each processor of which is subject to complete failure. Fault tolerance is a process that ensures the working of a system to its total capacity, even if one or more of its components fail. In fault-tolerant design, backup components are used in interconnection networks to automatically take the place of the failed component, guaranteeing that the system’s working continues. This paper proposed the fault-tolerant design in the form of Pjk and Cjk graphs, where n processing components are linked, and i of these n components creating a chain of maximum size, are used to perform the task, they can tolerate the failure of components, maintaining steady operation. In particular, we present the fault-tolerant designs of pyramid, OTIS, biswapped, and mesh-derived networks.
AB - Multiprocessor interconnection networks are mainly required to link a significant number of stable processor memory sets, every one of which is known as a processing vertex. Due to the cost-effectiveness, the design and utilization of multiprocessor interconnection networks have drawn attention lately. An interconnection network is extensively used in a parallel multiprocessor system to connect the processors and memory modules. In multiprocessor networks, vertices represent processors, and each processor of which is subject to complete failure. Fault tolerance is a process that ensures the working of a system to its total capacity, even if one or more of its components fail. In fault-tolerant design, backup components are used in interconnection networks to automatically take the place of the failed component, guaranteeing that the system’s working continues. This paper proposed the fault-tolerant design in the form of Pjk and Cjk graphs, where n processing components are linked, and i of these n components creating a chain of maximum size, are used to perform the task, they can tolerate the failure of components, maintaining steady operation. In particular, we present the fault-tolerant designs of pyramid, OTIS, biswapped, and mesh-derived networks.
KW - Biswapped network
KW - Fault tolerance design
KW - Interconnection networks
KW - Mesh derived network
KW - OTIS network
KW - Pyramid network
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U2 - 10.1007/s12083-023-01462-4
DO - 10.1007/s12083-023-01462-4
M3 - Article
AN - SCOPUS:85149242935
SN - 1936-6442
VL - 16
SP - 1125
EP - 1134
JO - Peer-to-Peer Networking and Applications
JF - Peer-to-Peer Networking and Applications
IS - 2
ER -