Advancement in silicon technology has led to miniaturization of devices, scaled power supply voltages and faster transistor switching speeds just to name a few. Along with these improvements came issues such as threshold voltage scaling, interconnect delays, sensitivity to variations, and increased power dissipation. Device miniaturization has also seen a rise of battery-operated electronic devices with very stringent energy requirements. Clearly, power dissipation is already a major design challenge in highly integrated systems. Leakage currents are becoming significant as the power supply and threshold voltages are scaled. Low power/energy techniques are thus very critical. This tutorial will review known techniques for reducing power/energy, focusing on recent results scaling the supply and the device threshold voltages and on bridging the divide between strong and weak inversion operations, as well as on using emerging nanoelectronic devices. These will show that GHz frequencies could be sustained in the (sub-)femto Joule per inverter energy range.