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Formal analysis of macro synchronous micro asychronous pipeline for hardware Trojan detection
F. K. Lodhi
, S. R. Hasan
, O. Hasan
,
F. Awwad
Department of Electrical and Communication Engineering
Research output
:
Chapter in Book/Report/Conference proceeding
›
Conference contribution
10
Citations (Scopus)
Overview
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Keyphrases
Formal Verification Methods
33%
Potential Attacks
33%
Electrical Signature
33%
Timing Properties
33%
Verification Result
33%
Globalization Trends
33%
Vulnerable Path
33%
Attack Path
33%
Pipeline Method
33%
Computer Science
Potential Attack
100%
Formal Verification
100%