Grand challenges of nanoelectronics and possible architectural solutions what do Shannon, von Neumann, Kolmogorov, and Feynman have to do with Moore

Valeriu Beiu

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    5 Citations (Scopus)

    Abstract

    This presentation will discuss the many challenges faced by the design of future tera-scale integrated circuits that result from the use of nano-scale electronic devices. The relations among these challenges will be studied, and a relative ranking will be proposed. Afterwards, we shall delve into the most difficult challenges. Finally, possible solutions will also be suggested.

    Original languageEnglish
    Title of host publication37th International Symposium on Multiple-Valued Logic, ISMVL 2007
    DOIs
    Publication statusPublished - 2007
    Event37th International Symposium on Multiple-Valued Logic, ISMVL 2007 - Oslo, Norway
    Duration: May 13 2007May 16 2007

    Publication series

    NameProceedings of The International Symposium on Multiple-Valued Logic
    ISSN (Print)0195-623X

    Other

    Other37th International Symposium on Multiple-Valued Logic, ISMVL 2007
    Country/TerritoryNorway
    CityOslo
    Period5/13/075/16/07

    ASJC Scopus subject areas

    • General Computer Science
    • General Mathematics

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