High-speed direct digital frequency synthesizers (DDFS) were designed in silicon-on-insulator (SOI) CMOS technology for space applications. The DDFSs were designed using two approaches. One approach used a standard binary digital-to-analog converter (DAC) and algorithms to minimize power dissipation and the amount of ROM look-up table required. The second approach used a non-linear DAC, which required only a small look-up table. Results of simulations showed operating frequencies of 2 GSps for both DDFSs with a DAC resolution of 12 bits.
|Number of pages||2|
|Journal||Biennial University/Government/Industry Microelectronics Symposium - Proceedings|
|Publication status||Published - 2003|
|Event||15th Biennial University/Government/Industry Microelectronics Symposium - Boise, ID, United States|
Duration: Jun 30 2003 → Jul 2 2003
ASJC Scopus subject areas
- Electrical and Electronic Engineering