Highly linear inductively degenerated 0.13μm CMOS LNA using FDC technique

Sana Arshad; Rashad Ramzan; Faiza Zafar; Qamar-Ul-Wahab

doi:10.1109/APCCAS.2014.7032760

Highly linear inductively degenerated 0.13μm CMOS LNA using FDC technique

Sana Arshad, Rashad Ramzan, Faiza Zafar, Qamar-Ul-Wahab

Department of Electrical and Communication Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

13 Citations (Scopus)

Abstract

In this paper, a highly linear, inductively degenerated, common source narrowband LNA is presented. An extremely simple feed-forward distortion circuit (FDC) which consists of an appropriately sized ac-coupled diode connected NMOS is proposed. This circuit generates distortion components at output, when added at the input node as a feed forward element (M₆). These distortion components partially cancel the 3^rd order nonlinearity of the cascode pair (M₂ & M₃), thus improving the overall linearity of LNA. The prototype is manufactured in standard 0.13μm CMOS process from IBM. Simulation and partial measurement results show the S11 and S22 to be -19.27dB and -7.14dB respectively at 2.45GHz. The simulation results of the LNA demonstrate a power gain of 18.5dB, NF of 4.38dB, input referred 1dBCP of -11.76dBm and IIP3 of +0.7dBm consuming 27.7mA from 1.0V power supply. The proposed LNA achieves the best input referred IIP3 reported in recent literature using 0.13μm CMOS in 2.4GHz frequency band.

Original language	English
Title of host publication	2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	225-228
Number of pages	4
Edition	February
ISBN (Electronic)	9781479952304
DOIs	https://doi.org/10.1109/APCCAS.2014.7032760
Publication status	Published - Feb 5 2015
Event	2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014 - Ishigaki Island, Okinawa, Japan Duration: Nov 17 2014 → Nov 20 2014

Publication series

Name	IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
Number	February
Volume	2015-February

Other

Other	2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014
Country/Territory	Japan
City	Ishigaki Island, Okinawa
Period	11/17/14 → 11/20/14

Keywords

High linearity
IIP3 of LNA
WLANLNA
feed forward distortion cancellation (FDC)
linear LNA
linearity improvement of LNA

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/APCCAS.2014.7032760

Cite this

Arshad, S., Ramzan, R., Zafar, F., & Qamar-Ul-Wahab (2015). Highly linear inductively degenerated 0.13μm CMOS LNA using FDC technique. In 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014 (February ed., pp. 225-228). Article 7032760 (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS; Vol. 2015-February, No. February). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APCCAS.2014.7032760

Highly linear inductively degenerated 0.13μm CMOS LNA using FDC technique. / Arshad, Sana; Ramzan, Rashad; Zafar, Faiza et al.
2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014. February. ed. Institute of Electrical and Electronics Engineers Inc., 2015. p. 225-228 7032760 (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS; Vol. 2015-February, No. February).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Arshad, S, Ramzan, R, Zafar, F & Qamar-Ul-Wahab 2015, Highly linear inductively degenerated 0.13μm CMOS LNA using FDC technique. in 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014. February edn, 7032760, IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS, no. February, vol. 2015-February, Institute of Electrical and Electronics Engineers Inc., pp. 225-228, 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014, Ishigaki Island, Okinawa, Japan, 11/17/14. https://doi.org/10.1109/APCCAS.2014.7032760

Arshad S, Ramzan R, Zafar F, Qamar-Ul-Wahab. Highly linear inductively degenerated 0.13μm CMOS LNA using FDC technique. In 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014. February ed. Institute of Electrical and Electronics Engineers Inc. 2015. p. 225-228. 7032760. (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS; February). doi: 10.1109/APCCAS.2014.7032760

Arshad, Sana ; Ramzan, Rashad ; Zafar, Faiza et al. / Highly linear inductively degenerated 0.13μm CMOS LNA using FDC technique. 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014. February. ed. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 225-228 (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS; February).

@inproceedings{77006e1971ed458eac4c6500242bc108,

title = "Highly linear inductively degenerated 0.13μm CMOS LNA using FDC technique",

abstract = "In this paper, a highly linear, inductively degenerated, common source narrowband LNA is presented. An extremely simple feed-forward distortion circuit (FDC) which consists of an appropriately sized ac-coupled diode connected NMOS is proposed. This circuit generates distortion components at output, when added at the input node as a feed forward element (M6). These distortion components partially cancel the 3rd order nonlinearity of the cascode pair (M2 & M3), thus improving the overall linearity of LNA. The prototype is manufactured in standard 0.13μm CMOS process from IBM. Simulation and partial measurement results show the S11 and S22 to be -19.27dB and -7.14dB respectively at 2.45GHz. The simulation results of the LNA demonstrate a power gain of 18.5dB, NF of 4.38dB, input referred 1dBCP of -11.76dBm and IIP3 of +0.7dBm consuming 27.7mA from 1.0V power supply. The proposed LNA achieves the best input referred IIP3 reported in recent literature using 0.13μm CMOS in 2.4GHz frequency band.",

keywords = "High linearity, IIP3 of LNA, WLANLNA, feed forward distortion cancellation (FDC), linear LNA, linearity improvement of LNA",

author = "Sana Arshad and Rashad Ramzan and Faiza Zafar and Qamar-Ul-Wahab",

note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014 ; Conference date: 17-11-2014 Through 20-11-2014",

year = "2015",

month = feb,

day = "5",

doi = "10.1109/APCCAS.2014.7032760",

language = "English",

series = "IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "February",

pages = "225--228",

booktitle = "2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014",

edition = "February",

}

TY - GEN

T1 - Highly linear inductively degenerated 0.13μm CMOS LNA using FDC technique

AU - Arshad, Sana

AU - Ramzan, Rashad

AU - Zafar, Faiza

AU - Qamar-Ul-Wahab,

PY - 2015/2/5

Y1 - 2015/2/5

N2 - In this paper, a highly linear, inductively degenerated, common source narrowband LNA is presented. An extremely simple feed-forward distortion circuit (FDC) which consists of an appropriately sized ac-coupled diode connected NMOS is proposed. This circuit generates distortion components at output, when added at the input node as a feed forward element (M6). These distortion components partially cancel the 3rd order nonlinearity of the cascode pair (M2 & M3), thus improving the overall linearity of LNA. The prototype is manufactured in standard 0.13μm CMOS process from IBM. Simulation and partial measurement results show the S11 and S22 to be -19.27dB and -7.14dB respectively at 2.45GHz. The simulation results of the LNA demonstrate a power gain of 18.5dB, NF of 4.38dB, input referred 1dBCP of -11.76dBm and IIP3 of +0.7dBm consuming 27.7mA from 1.0V power supply. The proposed LNA achieves the best input referred IIP3 reported in recent literature using 0.13μm CMOS in 2.4GHz frequency band.

AB - In this paper, a highly linear, inductively degenerated, common source narrowband LNA is presented. An extremely simple feed-forward distortion circuit (FDC) which consists of an appropriately sized ac-coupled diode connected NMOS is proposed. This circuit generates distortion components at output, when added at the input node as a feed forward element (M6). These distortion components partially cancel the 3rd order nonlinearity of the cascode pair (M2 & M3), thus improving the overall linearity of LNA. The prototype is manufactured in standard 0.13μm CMOS process from IBM. Simulation and partial measurement results show the S11 and S22 to be -19.27dB and -7.14dB respectively at 2.45GHz. The simulation results of the LNA demonstrate a power gain of 18.5dB, NF of 4.38dB, input referred 1dBCP of -11.76dBm and IIP3 of +0.7dBm consuming 27.7mA from 1.0V power supply. The proposed LNA achieves the best input referred IIP3 reported in recent literature using 0.13μm CMOS in 2.4GHz frequency band.

KW - High linearity

KW - IIP3 of LNA

KW - WLANLNA

KW - feed forward distortion cancellation (FDC)

KW - linear LNA

KW - linearity improvement of LNA

UR - http://www.scopus.com/inward/record.url?scp=84937907794&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84937907794&partnerID=8YFLogxK

U2 - 10.1109/APCCAS.2014.7032760

DO - 10.1109/APCCAS.2014.7032760

M3 - Conference contribution

AN - SCOPUS:84937907794

T3 - IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

SP - 225

EP - 228

BT - 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014

Y2 - 17 November 2014 through 20 November 2014

ER -

Highly linear inductively degenerated 0.13μm CMOS LNA using FDC technique

Abstract

Publication series

Other

Keywords

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this