Improving nano-circuit reliability estimates by using neural methods

    Research output: Chapter in Book/Report/Conference proceedingConference contribution


    The reliability of nano-sized combinational circuits can be estimated by using different techniques, such as mathematical equations, Monte Carlo simulations, algorithmic approaches, and combinations of these. Commonly used equations are functions of gate count, and of the reliability and number of devices that make up the gates. The aim of this paper is to present a(n alternative) neural-based approach which is more accurate than applying simple equations, while being faster than the time-consuming Monte Carlo technique.

    Original languageEnglish
    Title of host publicationNano-Net - 4th International ICST Conference, Nano-Net 2009, Proceedings
    Number of pages6
    Publication statusPublished - 2009
    Event4th International ICST Conference on Nano-Net, Nano-Net 2009 - Lucerne, Switzerland
    Duration: Oct 18 2009Oct 20 2009

    Publication series

    NameLecture Notes of the Institute for Computer Sciences, Social-Informatics and Telecommunications Engineering
    Volume20 LNICST
    ISSN (Print)1867-8211


    Other4th International ICST Conference on Nano-Net, Nano-Net 2009


    • Nano-metric circuits
    • Neural network model
    • Probability of failure
    • Reliability estimation
    • Reliability model

    ASJC Scopus subject areas

    • Computer Networks and Communications


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