TY - GEN
T1 - Improving nano-circuit reliability estimates by using neural methods
AU - Beg, Azam
PY - 2009
Y1 - 2009
N2 - The reliability of nano-sized combinational circuits can be estimated by using different techniques, such as mathematical equations, Monte Carlo simulations, algorithmic approaches, and combinations of these. Commonly used equations are functions of gate count, and of the reliability and number of devices that make up the gates. The aim of this paper is to present a(n alternative) neural-based approach which is more accurate than applying simple equations, while being faster than the time-consuming Monte Carlo technique.
AB - The reliability of nano-sized combinational circuits can be estimated by using different techniques, such as mathematical equations, Monte Carlo simulations, algorithmic approaches, and combinations of these. Commonly used equations are functions of gate count, and of the reliability and number of devices that make up the gates. The aim of this paper is to present a(n alternative) neural-based approach which is more accurate than applying simple equations, while being faster than the time-consuming Monte Carlo technique.
KW - Nano-metric circuits
KW - Neural network model
KW - Probability of failure
KW - Reliability estimation
KW - Reliability model
UR - http://www.scopus.com/inward/record.url?scp=84885887334&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84885887334&partnerID=8YFLogxK
U2 - 10.1007/978-3-642-04850-0_35
DO - 10.1007/978-3-642-04850-0_35
M3 - Conference contribution
AN - SCOPUS:84885887334
SN - 3642048498
SN - 9783642048494
T3 - Lecture Notes of the Institute for Computer Sciences, Social-Informatics and Telecommunications Engineering
SP - 270
EP - 275
BT - Nano-Net - 4th International ICST Conference, Nano-Net 2009, Proceedings
T2 - 4th International ICST Conference on Nano-Net, Nano-Net 2009
Y2 - 18 October 2009 through 20 October 2009
ER -