Lightweight PRINCE algorithm IP core for securing GSM messaging using FPGA

Monitoring and managing data from a remote asset to optimize maintenance and operation schedules using wireless communication have received more attention recently than before. Meanwhile, the rapid development of global system for mobile communication (GSM) systems makes communicating parties more vulnerable than ever to security attacks. The weaknesses in GSM security, such as flaws in implementation and cryptography algorithms, still need additional improvements and investigation to enhance the system performance in terms of security, cost and power consumption. In this study, a new security system design for securing GSM messaging with a lightweight PRINCE algorithm Intellectual Property (IP) Core using Field Programmable Gate Arrays (FPGA) is proposed. An energy and cost-efficient implementation of PRINCE algorithm implemented in an environment of a microprocessor system using XILINX FPGA board is developed. A complete microprocessor system is designed consisting of MicroBlaze processor, memory, serial communication and a PRINCE IP Core that can be contained in a single XILINX VIRTEX chip. The system can cipher the data using PRINCE algorithm on a VIRTEX-403 FPGA evaluation board and using GSM modems to communicate over a cellular network. Results show that the proposed design achieves a high speed of 31.765 MHz with a throughput of 2.032 Gbps at a low power consumption of 0.165 W and an efficiency of 2.126 Mbps per slice.