This paper explores the reliability of three different minimum fan-in majority gates full adder (FA) designs, and compares them to the performance of a standard XOR-based FA. The study will provide insights into different parameters that affect the reliability of these FAs. The paper will also present estimates for the power consumption and the speed achieved by some of these FAs. All these simulations show that minimum fan-in majority gates FAs are: (i) more reliable; (ii) faster; while also (Hi) consuming less power (than a standard XOR-based FA). The detailed reliability results will be extrapolated to link to the probability of failure of the elementary (nano-)devices. Such speed-power-reliability performance analyses are certainly essential and very timely for a better characterization of circuit designs, but also for identifying those designs amenable to future nanoelectronic technologies. The main conclusions are that small fan-in majority gates perform better than standard Boolean gates in all cost functions: speed, power, area, and reliability.
|Title of host publication||IEEE International Conference on Application-specific Systems Architectures and Processors|
|Publication status||Published - Jul 8 2007|
|Event||ASAP'07 - Montreal, Canada|
Duration: Jul 8 2007 → …
|Period||7/8/07 → …|