On-chip calibration of RF detectors by DC stimuli and artificial neural networks

Rashad Ramzan, Jerzy Da̧browski

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

In the nanometer regime, especially the RF and analog circuits exhibit wide parameter variability, and consequently every chip produced needs to be tested. On-chip Design for Testability (DfT) features, which are meant to reduce test time and cost also suffer from parameter variability. Therefore, RF calibration of all on-chip test structures is mandatory. In this paper, Artificial Neural Networks (ANN) are employed as multivariate regression technique to architect a general RF calibration scheme using DC- instead of RF stimuli. This relaxes the routing requirements on a chip for GHz test signals along with the reduction in test time and cost. The RF detector, a key element of a radio front-end DfT circuitry, designed in 65nm CMOS is used to demonstrate the calibration scheme.

Original languageEnglish
Title of host publicationProceedings of the 2008 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2008
Pages571-574
Number of pages4
DOIs
Publication statusPublished - 2008
Externally publishedYes
Event2008 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2008 - Atlanta, GA, United States
Duration: Jun 15 2008Jun 17 2008

Publication series

NameDigest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
ISSN (Print)1529-2517

Other

Other2008 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2008
Country/TerritoryUnited States
CityAtlanta, GA
Period6/15/086/17/08

Keywords

  • ANN application
  • On-chip RF detector
  • RF BIST
  • RF DfT
  • RF calibration
  • RF testing

ASJC Scopus subject areas

  • General Engineering

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