Abstract
This paper details a systematic method for significantly enhancing the noise margins of very fast threshold gates. The method is based on adding nonlinear terms determined from the Boolean form of the linearly separable (threshold) function to be implemented. It follows that linearly separable functions can be computed with high noise immunity by higher order perceptrons. Simulation results support our theoretical claims. Finally, two methods for drastically reducing the dissipated power of such higher order perceptron gates down to <50%, and respectively <10% are suggested.
| Original language | English |
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| Pages | 246-251 |
| Number of pages | 6 |
| Publication status | Published - 2001 |
| Externally published | Yes |
| Event | International Joint Conference on Neural Networks (IJCNN'01) - Washington, DC, United States Duration: Jul 15 2001 → Jul 19 2001 |
Other
| Other | International Joint Conference on Neural Networks (IJCNN'01) |
|---|---|
| Country/Territory | United States |
| City | Washington, DC |
| Period | 7/15/01 → 7/19/01 |
Keywords
- Noise immunity
- Threshold gates
- Threshold logic
- VLSI design
ASJC Scopus subject areas
- Software
- Artificial Intelligence