On ultra-low power hybrid NEMS-CMOS

V. Beiu; W. Ibrahim; M. Tache; T. J. King Liu

doi:10.1109/NANO.2014.6968045

On ultra-low power hybrid NEMS-CMOS

V. Beiu, W. Ibrahim, M. Tache, T. J. King Liu

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

In this paper we advocate the use of nano-electro-mechanical switches (NEMS) to eliminate static power consumption, and propose a dual-voltage hybrid NEMS-CMOS scheme to also reduce dynamic power consumption. The main idea is to use a smaller voltage to propagate information, and a larger voltage to drive the NEMS. CMOS amplifiers can be used to interface these two voltages. It follows that synthesizing gates with a large(r) number of inputs is beneficial, which matches very well the optimal NEMS circuit topology. Simulation results based on a particular 4-input Boolean function, show that significant power reductions can be expected when using such a hybrid design approach.

Original language	English
Title of host publication	Proceedings of the IEEE Conference on Nanotechnology
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	201-206
Number of pages	6
ISBN (Electronic)	9781479956227
DOIs	https://doi.org/10.1109/NANO.2014.6968045
Publication status	Published - Nov 26 2014
Event	2014 14th IEEE International Conference on Nanotechnology, IEEE-NANO 2014 - Toronto, Canada Duration: Aug 18 2014 → Aug 21 2014

Publication series

Name	Proceedings of the IEEE Conference on Nanotechnology
ISSN (Electronic)	1944-9399

Other

Other	2014 14th IEEE International Conference on Nanotechnology, IEEE-NANO 2014
Country/Territory	Canada
City	Toronto
Period	8/18/14 → 8/21/14

ASJC Scopus subject areas

Electrical and Electronic Engineering
Computer Science Applications
Modelling and Simulation
Instrumentation

Access to Document

10.1109/NANO.2014.6968045

Cite this

Beiu, V, Ibrahim, W, Tache, M & King Liu, TJ 2014, On ultra-low power hybrid NEMS-CMOS. in Proceedings of the IEEE Conference on Nanotechnology., 6968045, Proceedings of the IEEE Conference on Nanotechnology, Institute of Electrical and Electronics Engineers Inc., pp. 201-206, 2014 14th IEEE International Conference on Nanotechnology, IEEE-NANO 2014, Toronto, Canada, 8/18/14. https://doi.org/10.1109/NANO.2014.6968045

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title = "On ultra-low power hybrid NEMS-CMOS",

abstract = "In this paper we advocate the use of nano-electro-mechanical switches (NEMS) to eliminate static power consumption, and propose a dual-voltage hybrid NEMS-CMOS scheme to also reduce dynamic power consumption. The main idea is to use a smaller voltage to propagate information, and a larger voltage to drive the NEMS. CMOS amplifiers can be used to interface these two voltages. It follows that synthesizing gates with a large(r) number of inputs is beneficial, which matches very well the optimal NEMS circuit topology. Simulation results based on a particular 4-input Boolean function, show that significant power reductions can be expected when using such a hybrid design approach.",

author = "V. Beiu and W. Ibrahim and M. Tache and {King Liu}, {T. J.}",

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N2 - In this paper we advocate the use of nano-electro-mechanical switches (NEMS) to eliminate static power consumption, and propose a dual-voltage hybrid NEMS-CMOS scheme to also reduce dynamic power consumption. The main idea is to use a smaller voltage to propagate information, and a larger voltage to drive the NEMS. CMOS amplifiers can be used to interface these two voltages. It follows that synthesizing gates with a large(r) number of inputs is beneficial, which matches very well the optimal NEMS circuit topology. Simulation results based on a particular 4-input Boolean function, show that significant power reductions can be expected when using such a hybrid design approach.

AB - In this paper we advocate the use of nano-electro-mechanical switches (NEMS) to eliminate static power consumption, and propose a dual-voltage hybrid NEMS-CMOS scheme to also reduce dynamic power consumption. The main idea is to use a smaller voltage to propagate information, and a larger voltage to drive the NEMS. CMOS amplifiers can be used to interface these two voltages. It follows that synthesizing gates with a large(r) number of inputs is beneficial, which matches very well the optimal NEMS circuit topology. Simulation results based on a particular 4-input Boolean function, show that significant power reductions can be expected when using such a hybrid design approach.

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On ultra-low power hybrid NEMS-CMOS

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