TY - GEN
T1 - On wires at low electron densities
AU - Beiu, Valeriu
AU - Ibrahim, Walid
AU - Makki, Rafic Z.
PY - 2009
Y1 - 2009
N2 - When analyzing reliability, wires have in most cases been ignored, with gates taking the lion's share, and devices being considered only once in a while. With scaling, this "only-computations-fail" approach is not going to be accurate enough as wires will also start to err. Trying to do justice to communication (wires), this paper details a statistical failure analysis of wires following on the few papers which have made wires' reliability their concern. We will use a classical particle-like probabilistic approach to enhance on the accuracy of wires' length-dependent probabilities of failure due to the discreetness of charge. Covering some of the intrinsic noises, such an approach leads to "lower bound"-like wire reliability estimates, as ignoring other intrinsic noises, as well as extrinsic noises, variations, and defects. These results should have implications for design strategies of multi-/many-cores and networks-on-chip, as well as for forward-looking investigations on emerging nano-architectures.
AB - When analyzing reliability, wires have in most cases been ignored, with gates taking the lion's share, and devices being considered only once in a while. With scaling, this "only-computations-fail" approach is not going to be accurate enough as wires will also start to err. Trying to do justice to communication (wires), this paper details a statistical failure analysis of wires following on the few papers which have made wires' reliability their concern. We will use a classical particle-like probabilistic approach to enhance on the accuracy of wires' length-dependent probabilities of failure due to the discreetness of charge. Covering some of the intrinsic noises, such an approach leads to "lower bound"-like wire reliability estimates, as ignoring other intrinsic noises, as well as extrinsic noises, variations, and defects. These results should have implications for design strategies of multi-/many-cores and networks-on-chip, as well as for forward-looking investigations on emerging nano-architectures.
KW - Communication
KW - Interconnects
KW - Nano-electronics
KW - Noise (intrinsic)
KW - Reliability
KW - Wires
UR - http://www.scopus.com/inward/record.url?scp=77950972784&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77950972784&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:77950972784
SN - 9789810836948
T3 - 2009 9th IEEE Conference on Nanotechnology, IEEE NANO 2009
SP - 703
EP - 706
BT - 2009 9th IEEE Conference on Nanotechnology, IEEE NANO 2009
T2 - 2009 9th IEEE Conference on Nanotechnology, IEEE NANO 2009
Y2 - 26 July 2009 through 30 July 2009
ER -