When analyzing reliability, wires have in most cases been ignored, with gates (and devices) taking the lion's share. With scaling, this "only computing fails" approach is not going to be accurate enough as communication (wires) will also start to err. Trying to do justice to wires, this paper details a statistical failure analysis of wires following on the few papers which have made wires' reliability their concern. We will use a classical particle-like probabilistic approach to enhance on the accuracy of wires' length-dependent probabilities of failure due to the discreetness of charge. Covering some of the intrinsic noises, such an approach leads to "lower bound"-like wire reliability estimates, as ignoring other intrinsic noises, as well as extrinsic noises, variations, and defects. These results should have implications for multi-/many-cores and networks-on-chip, as well as forward-looking investigations on emerging nano-architectures.