Performance limits for processor networks with divisible jobs

Sameer Bataineh, Thomas G. Robertazzi

Research output: Contribution to journalArticlepeer-review

10 Citations (Scopus)


Ultimate performance limits to the aggregate processing speed of networks of processors that are processing a divisible job are described. These take the form of either closed-form expressions or numerical procedures to calculate the equivalent processing speed of an infinite number of processors. These processors are interconnected in either a linear daisy chain with load origination from the network interior or a tree topology. The tree topology is particularly general as a natural way to perform load distribution in a processor network topology with cycles (e.g., hypercube, toroidal network) is to use an embedded spanning tree. Such limits on performance are important as they provide an ideal baseline against which to compare the performance of finite configurations of processors.

Original languageEnglish
Pages (from-to)1189-1198
Number of pages10
JournalIEEE Transactions on Aerospace and Electronic Systems
Issue number4
Publication statusPublished - 1997
Externally publishedYes

ASJC Scopus subject areas

  • Aerospace Engineering
  • Electrical and Electronic Engineering


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