TY - GEN
T1 - The quest for reliable nano computations
AU - Beiu, Valeriu
PY - 2005
Y1 - 2005
N2 - In this presentation, we explore the feasibility of designing reliable nano-architectures using practical (i.e. very small = "less than 10") redundancy factors. To this end, we begin with a thorough review of redundant design strategies for fault-tolerant nano-architectures. We then adapt three redundant design strategies -modular redundancy, von Neumann multiplexing, and reconfigurability - to majority-gate circuits, and analytically evaluate these designs' reliabilities for very small redundancy factors (including fractional factors), using arguments as needed. This analysis motivates several extensions that allow optimization of reliability for very small redundancy factors, and highlights the benefit of using majority-gates in nano-scale design, paving the way for practical fault-tolerant architectures. Besides reliability, we simultaneously address low-power designing, and show that high-performance circuits can be operated reliably at ultra low switching energies.
AB - In this presentation, we explore the feasibility of designing reliable nano-architectures using practical (i.e. very small = "less than 10") redundancy factors. To this end, we begin with a thorough review of redundant design strategies for fault-tolerant nano-architectures. We then adapt three redundant design strategies -modular redundancy, von Neumann multiplexing, and reconfigurability - to majority-gate circuits, and analytically evaluate these designs' reliabilities for very small redundancy factors (including fractional factors), using arguments as needed. This analysis motivates several extensions that allow optimization of reliability for very small redundancy factors, and highlights the benefit of using majority-gates in nano-scale design, paving the way for practical fault-tolerant architectures. Besides reliability, we simultaneously address low-power designing, and show that high-performance circuits can be operated reliably at ultra low switching energies.
UR - http://www.scopus.com/inward/record.url?scp=33847090765&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=33847090765&partnerID=8YFLogxK
U2 - 10.1109/ICM.2005.1590021
DO - 10.1109/ICM.2005.1590021
M3 - Conference contribution
AN - SCOPUS:33847090765
SN - 0780392620
SN - 9780780392625
T3 - Proceedings of the International Conference on Microelectronics, ICM
SP - xix
BT - Proceedings 17th 2005 International Conference on Microelectronics, ICM 2005
T2 - 17th 2005 International Conference on Microelectronics, ICM 2005
Y2 - 13 December 2005 through 15 December 2005
ER -