Threshold Logic - From Vacuum Tubes to Nanoelectronics

Valeriu Beiu; Jose M. Quintana; Maria J. Avedillo; Mawahib Sulieman

doi:10.1109/MWSCAS.2003.1562439

Threshold Logic - From Vacuum Tubes to Nanoelectronics

Valeriu Beiu, Jose M. Quintana, Maria J. Avedillo, Mawahib Sulieman

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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Abstract

This paper reviews silicon implementations of threshold logic gates, covering several decades. It details numerous VLSI implementations including: capacitive (switched capacitor and floating gate with their variations), conductance/current (pseudo-nMOS, output-wired-inverters, and a plethora of solutions evolved from them), as well as many differential solutions. Nanoelectronic implementations (e.g., based on negative resistance devices and on single electron technologies) are shortly mentioned

Original language	English
Title of host publication	IEEE International Midwest Symposium on Circuit and Systems
DOIs	https://doi.org/10.1109/MWSCAS.2003.1562439
Publication status	Published - Dec 27 2003
Event	MWSCAS'03 - Cairo, Egypt Duration: Dec 27 2003 → …

Conference

Conference	MWSCAS'03
Period	12/27/03 → …

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10.1109/MWSCAS.2003.1562439

http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=1562439&url=http%3A%2F%2Fieeexplore.ieee.org%2Fiel5%2F10444%2F33167%2F01562439.pdf%3Farnumber%3D1562439

Cite this

@inproceedings{6e85398b00b749ddb99d481bc5198bd4,

title = "Threshold Logic - From Vacuum Tubes to Nanoelectronics",

abstract = "This paper reviews silicon implementations of threshold logic gates, covering several decades. It details numerous VLSI implementations including: capacitive (switched capacitor and floating gate with their variations), conductance/current (pseudo-nMOS, output-wired-inverters, and a plethora of solutions evolved from them), as well as many differential solutions. Nanoelectronic implementations (e.g., based on negative resistance devices and on single electron technologies) are shortly mentioned",

author = "Valeriu Beiu and Quintana, {Jose M.} and Avedillo, {Maria J.} and Mawahib Sulieman",

year = "2003",

month = dec,

day = "27",

doi = "10.1109/MWSCAS.2003.1562439",

language = "English",

booktitle = "IEEE International Midwest Symposium on Circuit and Systems",

note = "MWSCAS'03 ; Conference date: 27-12-2003",

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T1 - Threshold Logic - From Vacuum Tubes to Nanoelectronics

AU - Beiu, Valeriu

AU - Quintana, Jose M.

AU - Avedillo, Maria J.

AU - Sulieman, Mawahib

PY - 2003/12/27

Y1 - 2003/12/27

N2 - This paper reviews silicon implementations of threshold logic gates, covering several decades. It details numerous VLSI implementations including: capacitive (switched capacitor and floating gate with their variations), conductance/current (pseudo-nMOS, output-wired-inverters, and a plethora of solutions evolved from them), as well as many differential solutions. Nanoelectronic implementations (e.g., based on negative resistance devices and on single electron technologies) are shortly mentioned

AB - This paper reviews silicon implementations of threshold logic gates, covering several decades. It details numerous VLSI implementations including: capacitive (switched capacitor and floating gate with their variations), conductance/current (pseudo-nMOS, output-wired-inverters, and a plethora of solutions evolved from them), as well as many differential solutions. Nanoelectronic implementations (e.g., based on negative resistance devices and on single electron technologies) are shortly mentioned

U2 - 10.1109/MWSCAS.2003.1562439

DO - 10.1109/MWSCAS.2003.1562439

M3 - Conference contribution

BT - IEEE International Midwest Symposium on Circuit and Systems

T2 - MWSCAS'03

Y2 - 27 December 2003

ER -

Threshold Logic - From Vacuum Tubes to Nanoelectronics

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