TY - GEN
T1 - Variable-segment & variable-driver parallel regeneration techniques for RLC VLSI interconnects
AU - Awwad, Falah R.
AU - Nekili, Mohamed
N1 - Publisher Copyright:
Copyright 2002 ACM.
PY - 2002/4/18
Y1 - 2002/4/18
N2 - Repeaters are now widely used to enhance the performance of long On-Chip interconnects in CMOS VLSI. For RC-modeled interconnects, parallel repeaters have proved to be superior to serial ones. In this paper, a Variable-Segment Regeneration Technique is introduced and compared with a Variable-driver Parallel Technique, a recently proposed transparent repeater and with three conventional techniques. HSpice Simulations using a 0.25 μm TSMC technology show that both the variable-segment and variable-driver techniques feature 62% time delay saving and 354% Area-Delay product saving over the transparent repeater, and are superior to all conventional techniques. However, our new variable-segment technique is characterized by a 116% Area-Delay product saving over the variable-driver technique. Thus, making it the most performant in the field of high-performance RLC interconnect regeneration. The simulation results confirm the superiority of the parallel regeneration technique over the serial ones.
AB - Repeaters are now widely used to enhance the performance of long On-Chip interconnects in CMOS VLSI. For RC-modeled interconnects, parallel repeaters have proved to be superior to serial ones. In this paper, a Variable-Segment Regeneration Technique is introduced and compared with a Variable-driver Parallel Technique, a recently proposed transparent repeater and with three conventional techniques. HSpice Simulations using a 0.25 μm TSMC technology show that both the variable-segment and variable-driver techniques feature 62% time delay saving and 354% Area-Delay product saving over the transparent repeater, and are superior to all conventional techniques. However, our new variable-segment technique is characterized by a 116% Area-Delay product saving over the variable-driver technique. Thus, making it the most performant in the field of high-performance RLC interconnect regeneration. The simulation results confirm the superiority of the parallel regeneration technique over the serial ones.
KW - Parallel regeneration
KW - RLC interconnect
KW - Repeater
KW - VLSI
UR - http://www.scopus.com/inward/record.url?scp=84949022226&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84949022226&partnerID=8YFLogxK
U2 - 10.1145/505306.505332
DO - 10.1145/505306.505332
M3 - Conference contribution
AN - SCOPUS:84949022226
T3 - GLSVLSI 2002 - Proceedings of the 12th ACM Great Lakes Symposium on VLSI
SP - 118
EP - 123
BT - GLSVLSI 2002 - Proceedings of the 12th ACM Great Lakes Symposium on VLSI
PB - Association for Computing Machinery, Inc
T2 - 12th ACM Great Lakes Symposium on VLSI, GLSVLSI 2002
Y2 - 18 April 2002 through 19 April 2002
ER -