Repeaters are now widely used to enhance the performance of long On-Chip interconnects in CMOS VLSI. For RC-modeled interconnects, parallel repeaters have proved to be superior to serial ones. In this paper, a Variable-Segment Regeneration Technique is introduced and compared with a Variable-driver Parallel Technique, a recently proposed transparent repeater and with three conventional techniques. HSpice Simulations using a 0.25 μm TSMC technology show that both the variable-segment and variable-driver techniques feature 62% time delay saving and 354% Area-Delay product saving over the transparent repeater, and are superior to all conventional techniques. However, our new variable-segment technique is characterized by a 116% Area-Delay product saving over the variable-driver technique. Thus, making it the most performant in the field of high-performance RLC interconnect regeneration. The simulation results confirm the superiority of the parallel regeneration technique over the serial ones.