TY - GEN
T1 - VLSI arrays implementing parallel line-drawing algorithms
AU - Beiu, Valeriu
N1 - Publisher Copyright:
© by Akademie-Verlag Berlin 1989.
PY - 1989
Y1 - 1989
N2 - After a short description of the problems encountered in graphic systems concerning the image memory, the first part of this paper describes several algorithms which are easily parallelizable. The second part shows possible VLSI arrays implementing the above mentioned algorithms and area and time estimations.
AB - After a short description of the problems encountered in graphic systems concerning the image memory, the first part of this paper describes several algorithms which are easily parallelizable. The second part shows possible VLSI arrays implementing the above mentioned algorithms and area and time estimations.
KW - Area-time complexity
KW - Graphics
KW - Line-drawing algorithms
KW - Parallel algorithms
KW - VLSI arrays
KW - VLSI-based architecture
UR - http://www.scopus.com/inward/record.url?scp=85037537039&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85037537039&partnerID=8YFLogxK
U2 - 10.1007/3-540-50647-0_114
DO - 10.1007/3-540-50647-0_114
M3 - Conference contribution
AN - SCOPUS:85037537039
SN - 9783540506478
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 241
EP - 247
BT - Parcella 1988 - 4th International Workshop on Parallel Processing by Cellular Automata and Arrays, Proceedings
A2 - Schendel, Udo
A2 - Legendi, Tamas
A2 - Wolf, Gottfried
PB - Springer Verlag
T2 - 4th International Workshop on Parallel Processing by Cellular Automata and Arrays, Parcella 1988
Y2 - 17 October 1988 through 21 October 1988
ER -